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19-4803; Rev 1; 12/02
10.7Gbps EAM Driver
General Description
The MAX3935 is designed to drive an electro-absorption modulator (EAM) at data rates up to 10.7Gbps. It provides programmable output levels through externally adjustable bias and modulation currents. This EAM driver is fabricated with Maxim's in-house second-generation SiGe process. The MAX3935 accepts differential ECL or ground-referenced CML clock and data-input signals. Inputs are terminated with on-chip 50 resistors. An input-data retiming latch can be used to reject input-patterndependent jitter if a clock signal is available. The driver can modulate EAM devices at amplitudes up to 3.0VP-P when the device impedance is 50. Typical (20% to 80%) edge speeds are 34ps. The output has an on-chip 75 resistor for back termination. The MAX3935 allows for an EAM bias voltage up to 1.2V. The MAX3935 also includes an adjustable pulse-width control circuit to precompensate for asymmetrical EAM characteristics. o Single -5.2V Power Supply o Low 110mA Supply Current o 34ps Typical Rise/Fall Time o o o o o o Up to 10.7Gbps (NRZ) Operation On-Chip Termination Resistors Programmable Modulation Voltage Up to 3.0VP-P Programmable EAM Bias Voltage Up to 1.2V Adjustable Pulse-Width Control Selectable Data Retiming Latch
Features
MAX3935
o Modulation Enable Control o ESD Protection
Ordering Information
PART MAX3935EGJ MAX3935E/D TEMP RANGE -40C to +85C -40C to +85C PIN-PACKAGE 32 QFN-EP* Dice**
Applications
SONET OC-192 and SDH STM-64 Transmission Systems DWDM Metro and Long-Haul Transmitters Add/Drop Multiplexers
*EP = exposed pad. **Dice are designed to operate over this range, but are tested and guaranteed at TA = +25C only. Contact factory for availability. For the latest package outline information, go to www.maxim-ic.com/packages. Pin Configuration appears at end of data sheet
Typical Application Circuit
VBIASREF
-5.2V -5.2V BIASMON DATA+ 50 DATA+ MODN1 DATA50 DATAMOD 50 VOUT BIASSET GND EAM 50
MAX3952
10Gbps SERIALIZER CLK+ CLK50 50
MAX3935
VTT CLK+
MODN2
BIAS CLKPWC+ PWC- MODEN RTEN MODMON MODSET VEE -5.2V -5.2V -5.2V
L 100pF
RPWC 2k
100 -5.2V
VMODREF -5.2V -5.2V
REPRESENTS A CONTROLLED-IMPEDANCE TRANSMISSION LINE
Covered by U.S. patent number 5,883,910.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
10.7Gbps EAM Driver MAX3935
ABSOLUTE MAXIMUM RATINGS
Supply Voltage VEE ...............................................-6.0V to +0.5V VTT...........................................................(VEE - 0.5V) to +0.5V DATA+, DATA- and CLK+, CLK- .......(VTT - 1.2V) to the lower of (VTT + 1.2V) or +0.5V MODEN, RTEN, PWC+, and PWC- .............(VEE - 0.5V) to +0.5V MODSET and BIASSET Voltage .......(VEE - 0.5V) to (VEE + 1.5V) MOD and BIAS Voltage .............................(VEE + 1.0V) to +0.5V MODN1 and MODN2 Voltage ...............................-0.5V to +0.5V Operating Junction Temperature Range ...........-55C to +150C Storage Temperature Range .............................-55C to +150C Lead Temperature (soldering, 10s) .................................+300C Current into DATA+, DATA-, CLK+, CLK(VTT = 0V)....................................................-24mA to +30.5mA Current into DATA+, DATA-, CLK+, CLK(VTT = -1.3V) ..................................................-24mA to +24mA
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(VEE = -4.9V to -5.5V 6%, TA = -40C to +85C. Typical values are at VEE = -5.2V, IBIAS = 16.7mA, IMOD = 83.3mA, TA = +25C, unless otherwise noted.) (Note 1)
PARAMETER Power-Supply Voltage Power-Supply Current Single-Ended Input Resistance Bias Current-Setting Range Bias Current-Setting Error Bias Sensing Resistor Bias Current Temperature Stability Bias Off-Current MODEN and RTEN Input High MODEN and RTEN Input Low Power-Supply Rejection Ratio SIGNAL INPUT FOR VTT = 0 Single-Ended Input (DC-Coupled) Single-Ended Input (AC-Coupled) VIS VIS At high At low At high At low -1.00 0.075 -0.400 0 -0.15 0.400 -0.075 V V VIH VIL PSRR f 10MHz, 100mVP-P (Note 8) 50 RBIAS IBIAS = 40mA (Note 2) IBIAS = 1mA BIASSET (VEE + 0.4V) VEE + 2.0 VEE + 0.8 IBIAS SYMBOL VEE IEE Excluding bias and modulation current Input to VTT IBIAS defined in Figure 3 Bias current = 40mA, TA = +25C 40 1 -10 6.7 -480 -200 0.05 7.5 CONDITIONS MIN -5.5 TYP -5.2 106 50 MAX -4.9 140 60 40 +10 8.3 +480 UNITS V mA mA % ppm/C mA V V dB
2
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10.7Gbps EAM Driver
DC ELECTRICAL CHARACTERISTICS (continued)
(VEE = -4.9V to -5.5V 6%, TA = -40C to +85C. Typical values are at VEE = -5.2V, IBIAS = 16.7mA, IMOD = 83.3mA, TA = +25C, unless otherwise noted.) (Note 1)
PARAMETER Differential Input Swing (DC-Coupled) Differential Input Swing (AC-Coupled) SIGNAL INPUT FOR VTT = -1.3V Input Common Mode Single-Ended Input Differential Input Swing VICM VIS VID At high At low -1.225 -1.800 0.3 -1.3 -0.800 -1.375 2.0 V V VP-P SYMBOL VID VID CONDITIONS MIN 0.3 0.3 TYP MAX 2.0 1.6 UNITS VP-P VP-P
MAX3935
AC ELECTRICAL CHARACTERISTICS
(VEE = -4.9V to -5.5V 6%, TA = -40C to +85C. Typical values are at VEE = -5.2V, IBIAS = 16.7mA, IMOD = 83.3mA, TA = +25C, unless otherwise noted.) (Notes 1, 4, 5)
PARAMETER Input Data Rates Input Return Loss Modulation Current-Setting Range Modulation Current-Setting Error Modulation Sensing Resistor Modulation Current Temperature Stability Modulation Off-Current Output Back Termination Resistor Output Edge Speed Setup/Hold-Time Pulse-Width Adjustment Range Pulse-Width Stability Pulse-Width Control Input Range tR , t F tSU, tHD ZL = 50, 20% to 80% (Note 3) Figure 2 (Notes 2, 3) ZL = 50, at 10Gbps (Notes 2, 3) PWC+ and PWC- open (Notes 2, 3) For PWC+ and PWC-6 VEE VEE + 1.0 25 60 +6 VEE + 2.0 RMOD IMOD = 100mA (Note 2) IMOD = 20mA MODSET (VEE + 0.4V) 63.8 75.0 34 RLIN IMOD SYMBOL NRZ (Note 2) f 15GHz (Notes 2, 6) IMOD defined in Figure 3 (Note 7) TA = +25C (Note 9) 20 -10 2.7 -550 -200 0.1 86.3 3.0 CONDITIONS MIN TYP 10.7 15 100 +10 3.3 +550 MAX UNITS Gbps dB mA % ppm/C mA ps ps ps ps V
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10.7Gbps EAM Driver MAX3935
AC ELECTRICAL CHARACTERISTICS (continued)
(VEE = -4.9V to -5.5V 6%, TA = -40C to +85C. Typical values are at VEE = -5.2V, IBIAS = 16.7mA, IMOD = 83.3mA, TA = +25C, unless otherwise noted.) (Notes 1, 4, 5)
PARAMETER Output Overshoot/Undershoot Driver Random Jitter Driver Deterministic Jitter SYMBOL (Note 3) (Note 3) (Note 5) CONDITIONS MIN TYP 1 0.75 11 MAX UNITS % psRMS psP-P
Note 1: Note 2: Note 3: Note 4: Note 5: Note 6: Note 7: Note 8: Note 9:
Specifications at -40C are guaranteed by design and characterization. Guaranteed by design and characterization. Measured using a 10.7Gbps repeating 0000 0000 1111 1111 pattern. AC characterization performed using the circuit in Figure 1. Measured using a 10.7Gbps 213 -1 PRBS with eighty zeros + eighty ones input data pattern. For both data inputs (DATA+, DATA-) and clock inputs (CLK+, CLK-). Load impedance is 50 in parallel with an internal 75 termination. PSRR = 20 x log10 (VNOISE (ON VCC)/(IMOD 30)). Excludes the effect of the external op amp. For 40mA IMOD 100mA.
Typical Operating Characteristics
(TA = +25C, unless otherwise noted.) OPTICAL EYE DIAGRAM (IMOD = 100mA, 213 - 1 +80CID)
MAX3935 toc01
ELECTRICAL EYE DIAGRAM (IMOD = 100mA, 213 - 1 +80CID)
MAX3935 toc02
ELECTRICAL EYE DIAGRAM (IMOD = 20mA, 213 - 1 +80CID)
MAX3935 toc03
14ps/div
13ps/div
13ps/div
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10.7Gbps EAM Driver
Typical Operating Characteristics (continued)
(TA = +25C, unless otherwise noted.)
SUPPLY CURRENT (IEE) vs. TEMPERATURE (EXCLUDES BIAS AND MODULATION CURRENTS)
MAX3935 toc04
MAX3935
PULSE-WIDTH DISTORTION vs. TEMPERATURE
MAX3935 toc05
TYPICAL DISTRIBUTION OF RISE TIME
60 PERCENT OF UNITS (%) 50 40 30 20 10 0
MAX3935 toc06
150 140 130 SUPPLY CURRENT (mA) 120 110 100 90 80 70 60 50 -40 -20 0 20 40 60 80 TEMPERATURE (C)
2.5 20mA PULSE-WIDTH DISTORTION (ps) 2.0 100mA 1.5
1.0
0.5
0 -40 -20 0 20 40 60 80 TEMPERATURE (C)
32
33
34
35
36
37
38
RISE TIME (ps)
PULSE WIDTH vs. RPWC TYPICAL DISTRIBUTION OF FALL TIME
MAX3935 toc07
2000 810 PULSE WIDTH OF POSITIVE PULSE (ps) 790 770 750 730 710 690
1600
RPWC- () 1200 800
400
0
MAX3935 toc08
MODULATION VOLTAGE vs. VMODREF
PULSE WIDTH OF NEGATIVE PULSE (ps)
MAX3935 toc09
3.5 3.0 MODULATION VOLTAGE (V) 2.5 2.0 1.5 1.0 0.5 0 0 0.05 0.10 0.15 0.20 0.25
60 PERCENT OF UNITS (%) 50 40 30 20 10 0 32 33 34 35 36 37 38 FALL TIME (ps)
0
400
800
1200
1600
2000
RPWC+ ()
0.30
VMODREF (V)
BIAS VOLTAGE (50) LOAD vs. VBIASREF
MAX3935 toc10
POWER-SUPPLY REJECTION RATIO vs. FREQUENCY
83.3mA 55 50 PSRR (dB) 45 40 35 30 25 20 0.01 0.1 1 10 100 1000 10,000 20mA 100mA
MAX3935 toc11
1.4 1.2 BIAS VOLTAGE (V) 1.0 0.8 0.6 0.4 0.2 0 0 0.05 0.10 0.15 VBIASREF (V) 0.20 0.25
60
0.30
FREQUENCY (kHz)
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10.7Gbps EAM Driver MAX3935
Typical Operating Characteristics (continued)
(TA = +25C, unless otherwise noted.)
DIFFERENTIAL S11 vs. FREQUENCY
MAX3935 toc12
S22 vs. FREQUENCY WITH POWER OFF
MAX3935 toc13
0 -5 -10 -15 -20 -25 -30 -35 |S11| (dB)
0 -5 -10 |S22| (dB) -15 -20 -25
-40 -45 0 2 4 6 8 10 12 14 16 18 20 FREQUENCY (GHz) -30 0 2 4 6 8 10 12 14 16 18 20 FREQUENCY (GHz)
Pin Description
PIN 1, 4 2 3 5, 8 6 7 9 10 11, 18, 22, 30 12, 13, 17, 23, 28, 29 14 15 16, 24 19, 21 20 25 NAME VTT DATA+ DATAVTT CLK+ CLKPWC+ PWCGND VEE MODMON MODSET N.C. MODN2, MODN1 MOD BIAS FUNCTION Termination Reference Voltage for Data Inputs Noninverting Data Input, with 50 On-Chip Termination Inverting Data Input, with 50 On-Chip Termination Termination Voltage for Clock Inputs Noninverting Clock Input for Data Retiming, with 50 On-Chip Termination Inverting Clock Input for Data Retiming, with 50 On-Chip Termination Positive Input for Modulation Pulse-Width Adjustment. Connected to VEE through RPWC. Negative Input for Modulation Pulse-Width Adjustment. Connected to VEE through RPWC. Ground Negative Supply Voltage Modulation Current Monitor. (VMODMON - VEE) / 3 = IMOD. Modulation Current Set. Connected to the output of an external op amp (see the Design Procedure section). No Connection. Leave unconnected. Complementary Modulation Output with On-Chip Resistive Load. Connect to GND. Modulation Output, DC-Coupled to EAM EAM Bias Output. Connect to the EAM through an inductor.
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10.7Gbps EAM Driver
Pin Description (continued)
PIN 26 27 31 32 NAME BIASSET BIASMON MODEN RTEN FUNCTION Bias Current Set. Connected to the output of an external op amp (see the Design Procedure section). Bias Current Monitor. (VBIASMON - VEE) / 7.5 = IBIAS. TTL/CMOS Modulation Enable Input. Low for normal operation, high to put the EAM in the absorption (logic 0) state. Internal 100k pullup to GND. TTL/CMOS Data Retiming Input. Low for retimed data, high to bypass retiming latch. Internal 100k pullup to GND.
MAX3935
GND DATA+ 50 DATA+ MODN1 DATA50 DATABIAS PATTERN GENERATOR 15 OSCILLOSCOPE MOD 50 VOUT CLK+ 50 CLK+ MODN2 CLK50 CLKRTEN -5.2V -5.2V MODEN -5.2V 50
MAX3935EGJ
VTT
Figure 1. AC Characterization Circuit
Detailed Description
The MAX3935 EAM driver consists of a high-speed modulation driver and an EAM-biasing block (see Figure 3). The clock and data inputs to the modulation driver interface with ECL and CML logic levels. The modulation and bias outputs sink current to V EE at -5.2V. The modulation output stage is composed of a highspeed differential pair and a programmable current source rise times a maximum modulation current of 100mA. The rise and fall times are typically 34ps. The modulation current is designed to produce an EAM voltage up to 3.0VP-P when driving a 50 module. The
3.0Vp-p results from 100mA through 50 in parallel with an internal 75 resistor (30). Any loading of the EAM module with capacitance degrades the optical output performance. Because the BIAS output is connected to the EAM, minimize the parasitic capacitance associated with this pad by using an inductor (L) to isolate the BIAS pin from the EAM.
Clock/Data Input Logic Levels
The MAX3935 is directly compatible with 0V reference CML. Other logic interfaces are possible with AC-coupling capacitors. For 0V CML of AC-coupled logic, set VTT to 0V. For other DC-coupled differential signals, set VTT to the common-mode input voltage.
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10.7Gbps EAM Driver MAX3935
(MODMON). The voltage at BIASMON is equal to (IBIAS RBIAS) + VEE, and the voltage at MODMON is equal to (IMOD RMOD) + VEE. IBIAS and IMOD are shown in Figure 3. The internal resistors RBIAS and RMOD are 7.5 and 3, respectively (10%). Connect BIASMON and MODMON to the inverting input of an op amp to program the bias and modulation current (see Design Procedure).
CLK+ VIS = 0.15V TO 1.0V CLKtSU DATADATA+ VIS = 0.15V TO 1.0V tHD
Design Procedure
Programming the Modulation Voltage
The EAM modulation voltage results from IMOD passing through the EAM impedance in parallel with the internal 75 termination resistor. VMOD IMOD x ZEAM x 75 ZEAM + 75
VID = 0.3V TO 2.0V (DATA+) - (DATA-)
0.6V TO 3.0V VOUT
Figure 2. Required Input Signal, Setup/Hold-Time Definition and Output Polarity
Optional Input Data Retiming
To eliminate pattern-dependent jitter in the input data, connect a synchronous differential clock signal to the CLK+ and CLK- inputs, and the RTEN control input should be tied low. The input data is retimed on the rising edge of CLK+. If RTEN is tied high or left floating, the retiming function is disabled and the input data is directly connected to the output stage. Leave CLK+ and CLK- open when retiming is disabled.
To program the desired modulation current, connect the inverting input of an op amp (see the Typical Application Circuit) to MODMON and connect the output to MODSET. Connect the positive op amp voltage supply to ground and the negative supply to VEE. The modulation current is set by connecting a reference voltage VMODREF to the noninverting input of the op amp. See the Modulation Voltage vs. V MODREF graph in the Typical Operating Characteristics to select the value of VMODREF that corresponds to the required modulation current. IMOD = VMODREF 3
Pulse-Width Control
The pulse-width control circuit can be used to minimize pulse-width distortion. The differential voltage between PWC+ and PWC- adjusts the pulse-width compensation. When PWC+ and PWC- are left open, the pulsewidth control circuit is automatically disabled.
Programming the Bias Voltage
The EAM bias voltage results from I BIAS passing through the EAM impedance in parallel with the internal 75 termination resistor. VBIAS IBIAS x ZEAM x 75 ZEAM + 75
Modulation Output Enable
The MAX3935 incorporates a modulation current enable input. When MODEN is low, the modulation output (MOD) is enabled. When MODEN is high or floating, the output is disabled. In the disabled condition, the modulation output sinks current to keep the EAM module in the high-absorption state. The typical EAM enable time is 2ns, and the typical disable time is 5ns.
Current Monitors
The MAX3935 features a bias-current monitor output (BIASMON) and a modulation-current monitor output
To program the desired EAM bias current, connect the inverting input of an op amp (see the Typical Application Circuit) to BIASMON and connect the output to BIASSET. Connect the positive op amp voltage supply to ground and the negative supply to VEE . The EAM bias current is set by connecting a reference voltage VBIASREF to the noninverting input of the op amp. See the Bias Voltage vs. V BIASREF graph in the Typical Operating Characteristics to select the value of VBIAS that corresponds to the required EAM bias voltage.
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10.7Gbps EAM Driver MAX3935
RTEN
MODEN
VTT 50 CLK+ 100 50 MOD2 50 CLKQ DATA+ 50 D MUX 0 PWC L 100 BIAS MOD MOD1 MODN2 50 MODN1 50 75 75 EAM 50
50 DATAVTT 1mA 50 50
1 IMOD IBIAS
1mA RMOD 5k RBIAS 5k
RPWC PWC+ 2k VEE PWC-
MODSET
BIASSET VEE MODMON VEE
BIASMON
Figure 3. MAX3935EGJ Functional Diagram
IBIAS =
VBIASREF 7.5
high enough to regulate at the power-supply ripple frequency on VEE.
Pulse-Width Control Setup
Two methods of control are possible when pulse predistortion is desired to minimize distortion at the receiver. The pulse width can be set with a 2k potentiometer (or equivalent fixed resistors); or applying a voltage, with VEE + 1V common mode, to the PWC pins can set it. See Table 1 for the desired effect of the pulse-width setting.
To keep the bias and modulation currents in compliance, the following constraint on the total current must be made for 50 EAM modules: |VEE| - (IBIAS + IMOD) 30 1.55V
External Op Amp Selection
External op amps are required for regulating the bias and modulation currents. The ability to operate from a single supply with input common-mode range extending to the negative supply rail is critical in the op amp selection. Low bias current and high PSRR also are important. Bias current to the inverting input passes through a 5k resistor. This could add an error to the voltage produced by the modulation and bias currentsense resistors. The op amp gain bandwidth must be
Table 1. Pulse-Width Control
PULSE WIDTH 100% >100% <100% RP, RN for RP + RN = 2k 1k or Open RP > RN RP < RN VPWC+, VPWC- for VCM = VEE + 1V VPWC+ = VPWC- = VEE + 1V VPWC+ > VPWCVPWC+ < VPWC-
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9
10.7Gbps EAM Driver MAX3935
Applications Information
Layout Considerations
To minimize loss and crosstalk, keep the connections between the MAX3935 output and the EAM module as short as possible. Use good high-frequency layout techniques and multilayer boards with uninterrupted ground plane to minimize EMI and crosstalk. Make circuit boards using low-loss dielectrics. Use controlledimpedance lines for the clock and data inputs as well as the modulation output. Wire Bonding Die For high-current density and reliable operation, the MAX3935 uses gold metalization. Make connections to the die with gold wire only, using ball-bonding techniques. Wedge-bonding processes are not recommended due to possible fracturing of sublayers caused by stress during bonding. Die thickness is 8 mils (203m). Die size is 64 mils by 120 mils (1.626mm by 3.048mm). The inductance at the high-speed connections for MOD1, MOD2 and MODN1, MODN2 must be minimized. The minimum length of the bond wires is constrained by the type of wire bonder used as well as the dimensions of the die. Wire length measured in the x-y plane from the edge of the die should approach 15 mils if possible. The bond wire must not come closer to the edge of die than 2X the bond wire diameter. MOD1 and MOD2 should each have a wire bond to reduce the total inductance for the MOD output.
VTT GND
Input and Output Schematics
50 DATA+
50
DATA-
VEE
Figure 4. Equivalent Input Circuit
GND
MODN1 MOD1 MOD2 MODN2
GND
100 150
100 150
150
150
IMOD VEE * NOTE: ESD PROTECTION IS INCLUDED ON MOD1, MOD2, MODN1, AND MODN2.
Figure 5. Equivalent Output Circuit
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10.7Gbps EAM Driver
Pin Configuration
BIASMON
Chip Topography
The origin for pad coordinates is the center of the die. All pad locations are referenced from the origin and indicate the center of the pad where the bond wire should be connected. For more information on bonding coordinates refer to Maxim Application Note HFAN08.0.1: Understanding Bonding Coordinates and Physical Die Size on Maxim's website.
MAX3935
RTEN
GND
VEE
VEE
32
31
30
29
28
27
26
25 24 23 22 21
BIAS
TOP VIEW
MODEN
BIASSET
VTT
1 2 3 4 5 6 7 8 10 11 12 13 14 15 16
N.C.
VEE
DATA+ DATAVTT VTT
Chip Information
TRANSISTOR COUNT: 1535 SUBSTRATE: INSULATOR, CONNECT TO GND PROCESS: SiGe BIPOLAR DIE THICKNESS: 8 mils
GND MODN1 MOD MODN2 GND
VEE
MAX3935
20 19 18 17
CLK+ CLKVTT
9
VEE
VEE
THE EXPOSED PAD MUST BE SOLDERED TO SUPPLY GROUND ON THE CIRCUIT BOARD.
MODMON
MODSET
PWC+
PWC-
GND
N.C.
Chip Topography
N.C. N.C. RTEN MODEN VCC VEE VEE GND GND VEE VEE BIASSET BIASMON BIAS GND
VTT
VEE
DATA+ DATAVTT
GND MODN1 MOD1
VTT CLK+ CLKVTT
MOD2 MODN2 GND VEE
N.C. N.C.
PWC+ PWC-
N.C. N.C.
GND VEE
VEE GND
GND VEE
VEE
MODSET MODMON N.C.
GND
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11
10.7Gbps EAM Driver MAX3935
Pad Coordinates
PAD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 NAME VTT CLKCLK+ VTT VTT DATADATA+ VTT N.C. N.C. RTEN MODEN GND VEE VEE GND GND VEE VEE BIASMON BIASSET BIAS GND VEE COORDINATE X -1393.5 -1393.5 -1393.5 -1393.5 -1393.5 -1393.5 -1393.5 -1393.5 -914.5 -788.5 -637.5 -511.5 -133.5 -7.5 118.5 348.5 474.5 703.5 829.5 955.5 1081.5 1207.5 1333.5 1393.5 Y -531 -392 -266 -140 140 266 392 530 681 681 681 681 681 681 681 681 681 681 681 681 681 681 681 530 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 GND MODN1 MOD1 MOD2 MODN2 GND VEE GND N.C. MODSET MODMON VEE VEE GND GND VEE VEE GND N.C. N.C. PWCPWC+ N.C. N.C. PAD NAME COORDINATE X 1393.5 1393.5 1393.5 1393.5 1393.5 1393.5 1393.5 1333.5 1207.5 1081.5 955.5 829.5 703.5 474.5 348.5 118.5 -7.5 -133.5 -259.5 -385.5 -511.5 -637.5 -788.5 -914.5 Y 392 266 140 -140 -266 -392 -531 -681 -681 -681 -681 -681 -681 -681 -681 -681 -681 -681 -681 -681 -681 -681 -681 -681
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10.7Gbps EAM Driver
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.
MAX3935
PACKAGE OUTLINE, 16,20,28,32L QFN, 5x5x0.90 MM 1
21-0091
I
2
______________________________________________________________________________________
32L QFN.EPS
13
10.7Gbps EAM Driver MAX3935
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.
PACKAGE OUTLINE, 16,20,28,32L QFN, 5x5x0.90 MM 1
21-0091
I
2
Maxim makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Maxim assume any liability arising out of the application or use of any product or circuit and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters can and do vary in different applications. All operating parameters, including "typicals" must be validated for each customer application by customer's technical experts. Maxim products are not designed, intended or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Maxim product could create a situation where personal injury or death may occur. Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
14 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2002 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
32L QFN.EPS

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